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FMCJ452 DWADRV9009-FMCOMMS8-EBZ 四收四发射频FMC子卡

Introduction

The AD-FMCOMMS8-EBZ is an integrated RF design containing two Analog Devices ADRV9009 wideband transceivers.
By connecting to a compatible FPGA development board that supports FMC HPC mechanical connector and JESD204B
bus interface it can be used for prototyping with upto 4 Transmit and Receive channels that can be synchronised
in phase and frequency. Additionally it can be used with the ADRV9009-ZU11EG RF-SOM system allowing for 8 phase
and frequency synchronised Transmit and Receive channels for complex multi-stream applications ensuringend-to-end deterministic latency.

The ADRV9009 Transceivers include integrated LO and phase synchronization. Overall system frequency & phase
synchronization is maintained with a clock tree structure using ADI highperformance low jitter HMC7044 device,
making it ideal for applications requiring RF phase alignment with a large number of channels.

Highlevel Specification

1.Two ADRV9009 devices, providing (in total):

 ●  Quad transmitters

 ●  Quad receivers

 ●  Quad input Observation Receiver for DPD

 ●  Max Rx BW: 200 MHz

 ●  Max Tunable Tx synthesis BW: 450 MHz

 ●  Max Observation Rx BW: 450MHz

 ●  Fully integrated fractional-N RF synthesizers

 ●  Multi-chip phase synchronization for all RF LO and baseband clocks

 ●  Tuning range: 75 MHz to 6000 MHz

2.FMC HPC Compatible interface

3.Complies with VITA 57.1 mechanical dimensions 84mm x 69mm(not full compliance with keep out areas)

4.Platform development environment support includes Industry standard Linux Industrial I/O (IIO) Applications, 
MATLAB®, Simulink®, and GNU Radio, and streaming 
interfaces for custom C, C++, python, and C# applications

5.HDL reference designs and drivers to allow zero day development

Hardware

X-Grade Rev A Schematics

X-Grade Rev A BOM

Rev B Board Design Files

STEP file of the bare PCB

 

Getting Started

The following is leveraged directly from the ADRV9009-ZU11EG RF-SOM site.

1.Quick Start Guides

 ●  FMCOMMS8 Quick Start Guide

 ●  ADRV9009-ZU11EG Quick Start Guide

 ●  Configure a pre-existing SD-Card

2.Linux Applications

 ●  IIO Scope

    ADRV9009/ADRV9008 IIO Scope View

    ADRV9009/ADRV9008 Control IIO Scope Plugin

    Advanced ADRV9009/ADRV9008 Control IIO Scope Plugin

 ●  FRU EEPROM Utility

3.Push custom data into/out of the ADRV9009

 ●  Basic Data files and formats

 ●  Stream data into/out of MATLAB

4.Design with the ADRV9009

5.Understanding the ADRV9009

 ●  ADRV9009 Product page

 ●  Full Datasheet and chip design package

 ●  MATLAB Filter Wizard / Profile Generator for ADRV9009

6.Hardware in the Loop / How to design your own custom BaseBand

 ●  GNU Radio

 ●  Board Support Package for MathWorks Tools

7.Design with the ADRV9009-ZU11EG based platform

 ●  Linux software

    ADRV9009/ADRV9008 Linux Device Driver

           ADRV9009/ADRV9008 Device Driver Customization

           Customizing the devicetree on the target

    JESD204 (FSM) Interface Linux Kernel Framework

    HMC7044 Clock Jitter Attenuator with JESD204B Linux Driver

    AXI-DMAC DMA Controller Linux Driver

    JESD204B Transmit Linux Driver

        JESD204B Status Utility

    JESD204B Receive Linux Driver

       JESD204B Status Utility

    AXI JESD204B GT HDL Linux Driver

           JESD204 Eye Scan

    AXI ADC HDL Linux Driver

    AXI DAC HDL Linux Driver

 ●  ADRV9009/ADRV9008 No-OS System Level Design Setup

 ●  3HDL Reference Design